Job Description
Join Nexus Future Labs at the forefront of 2026's quantum revolution. We're seeking a visionary Quantum Computing Architect to design next-gen systems that will redefine computational boundaries. In this pivotal role, you'll pioneer fault-tolerant quantum architectures and collaborate with Nobel laureates to solve humanity's most complex challenges. Our state-of-the-art facility offers unparalleled resources for quantum experimentation, with a culture that rewards bold innovation and breakthrough thinking.
This position includes equity, comprehensive benefits, and a dedicated R&D budget. You'll work in our downtown San Francisco hub with direct access to quantum hardware and a team of world-class physicists. Our mission is to accelerate quantum adoption by 2026 – and you'll lead the technical charge.
Responsibilities
- Design scalable quantum computing architectures leveraging superconducting qubits and photonic systems
- Develop error-correction frameworks for fault-tolerant quantum operations at scale
- Lead cross-functional teams in quantum algorithm optimization for real-world applications
- Collaborate with hardware teams to integrate quantum processors with classical HPC systems
- Establish quantum security protocols for post-quantum cryptography implementation
- Drive quantum software standardization and API development for developer ecosystem
- Present breakthrough research at international quantum computing conferences
Qualifications
- PhD in Quantum Physics, Computer Science, or related field with 5+ years quantum experience
- Expertise in quantum circuit design and quantum error correction methodologies
- Published research in peer-reviewed quantum computing journals (arXiv submissions required)
- Proficiency with quantum programming frameworks (Qiskit, Cirq, Q#) and low-level quantum control systems
- Experience with cryogenic quantum hardware and microwave control systems
- Demonstrated ability to translate theoretical quantum models into practical implementations
- Strong background in distributed computing and high-performance computing architectures